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"A fast modular simulator for combinational logic circuits generated by ..."

Daniel M. Cabrita, Walter Godoy Jr., Heitor S. Lopes (2013)

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DOI: 10.1109/CEC.2013.6557908

access: closed

type: Conference or Workshop Paper

metadata version: 2017-06-15

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Daniel M. Cabrita, Walter Godoy Jr., Heitor S. Lopes:
A fast modular simulator for combinational logic circuits generated by genetic algorithm. IEEE Congress on Evolutionary Computation 2013: 2797-2801

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