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"A pipelined architecture for user-defined floating-point complex division ..."

Shaobing Huang et al. (2017)

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DOI: 10.1109/CCECE.2017.7946829

access: closed

type: Conference or Workshop Paper

metadata version: 2018-03-08

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  dblp key:
  - conf/ccece/HuangYHL17
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  - https://dblp.org/rec/conf/ccece/HuangYHL17
Shaobing Huang, Li Yu, Fang-Jian Han, Yiwen Luo:
A pipelined architecture for user-defined floating-point complex division on FPGA. CCECE 2017: 1-4

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