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"A fault tolerant cache architecture for sub 500mV operation: resizable ..."

Avesta Sasan et al. (2009)

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DOI: 10.1145/1629395.1629431

access: closed

type: Conference or Workshop Paper

metadata version: 2018-11-06

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Avesta Sasan, Houman Homayoun, Ahmed M. Eltawil, Fadi J. Kurdahi:
A fault tolerant cache architecture for sub 500mV operation: resizable data composer cache (RDC-cache). CASES 2009: 251-260

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