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"Hardware Design and Verification Techniques for Supply Chain Risk Mitigation."

Bao Liu, Yier Jin, Gang Qu (2015)

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DOI: 10.1109/CADGRAPHICS.2015.53

access: closed

type: Conference or Workshop Paper

metadata version: 2022-04-09

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  dblp key:
  - conf/cadgraphics/LiuJQ15
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Bao Liu, Yier Jin, Gang Qu:
Hardware Design and Verification Techniques for Supply Chain Risk Mitigation. CAD/Graphics 2015: 238-239

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