![](https://dblp1.uni-trier.de/img/logo.ua.320x120.png)
![](https://dblp1.uni-trier.de/img/dropdown.dark.16x16.png)
![](https://dblp1.uni-trier.de/img/peace.dark.16x16.png)
Остановите войну!
for scientists:
![search dblp search dblp](https://dblp1.uni-trier.de/img/search.dark.16x16.png)
![search dblp](https://dblp1.uni-trier.de/img/search.dark.16x16.png)
default search action
"An Ultra-low-power 28nm CMOS Dual-die ASIC Platform for Smart Hearables."
Yu Pu et al. (2018)
- Yu Pu, Danny Butterfield, Jorge Garcia, Jing Xie, Mark Lin, Rohit Sauhta, Rick Farley, Steve Shellhammer, Moses Derkalousdian, Adam Newham, Chunlei Shi, Ravi Shenoy, Evgeni Gousev, Rashid Attar:
An Ultra-low-power 28nm CMOS Dual-die ASIC Platform for Smart Hearables. BioCAS 2018: 1-4
![](https://dblp1.uni-trier.de/img/cog.dark.24x24.png)
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.