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"Analog/Mixed-Signal Circuit Verification Using Models Generated from ..."

Scott Little et al. (2007)

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DOI: 10.1007/978-3-540-75596-8_10

access: closed

type: Conference or Workshop Paper

metadata version: 2017-06-01

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  - conf/atva/LittleWJM07
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Scott Little, David Walter, Kevin R. Jones, Chris J. Myers:
Analog/Mixed-Signal Circuit Verification Using Models Generated from Simulation Traces. ATVA 2007: 114-128

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