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"A DFT Selection Method for Reducing Test Application Time of System-on-Chips."

Masahide Miyazaki et al. (2003)

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DOI: 10.1109/ATS.2003.1250847

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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  dblp key:
  - conf/ats/MiyazakiHDMF03
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  persistent URL:
  - https://dblp.org/rec/conf/ats/MiyazakiHDMF03
Masahide Miyazaki, Toshinori Hosokawa, Hiroshi Date, Michiaki Muraoka, Hideo Fujiwara:
A DFT Selection Method for Reducing Test Application Time of System-on-Chips. Asian Test Symposium 2003: 412-417

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