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"A New Inter-Core Built-In-Self-Test Circuits for Tri-State Buffers in the ..."

Tetsuji Kishi et al. (2001)

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DOI: 10.1109/ATS.2001.990332

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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Tetsuji Kishi, Mitsuyasu Ohta, Takashi Taniguchi, Hiroshi Kadota:
A New Inter-Core Built-In-Self-Test Circuits for Tri-State Buffers in the System on a Chip. Asian Test Symposium 2001: 462

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