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"Area-Efficient and Reliable Hybrid CMOS/Memristor ECC Circuit for ReRAM ..."

Mamoru Ishizaka, Michihiro Shintani, Michiko Inoue (2018)

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DOI: 10.1109/ATS.2018.00040

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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  dblp key:
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  - https://dblp.org/rec/conf/ats/IshizakaSI18
Mamoru Ishizaka, Michihiro Shintani, Michiko Inoue:
Area-Efficient and Reliable Hybrid CMOS/Memristor ECC Circuit for ReRAM Storage. ATS 2018: 167-172

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