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"MLC/3LC NAND flash SSD cache with asymmetric error reduction huffman ..."

Hikaru Watanabe, Yoshiaki Deguchi, Ken Takeuchi (2017)

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DOI: 10.1109/ASSCC.2017.8240240

access: closed

type: Conference or Workshop Paper

metadata version: 2018-11-02

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Hikaru Watanabe, Yoshiaki Deguchi, Ken Takeuchi:
MLC/3LC NAND flash SSD cache with asymmetric error reduction huffman coding for tiered hierarchical storage. A-SSCC 2017: 157-160

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