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"Sub-ns Access Sub-mW/GHz 32 Kb SRAM with 0.45 V Cross-Point-5T Cell and ..."

C. Y. He et al. (2019)

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DOI: 10.1109/A-SSCC47793.2019.9056897

access: closed

type: Conference or Workshop Paper

metadata version: 2021-08-24

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  - conf/asscc/HeTCCLSJCCRI19
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  - https://dblp.org/rec/conf/asscc/HeTCCLSJCCRI19
C. Y. He, K. H. Tang, T. S. Chen, K. Y. Chang, C. H. Lin, K. Sato, Shyh-Jye Jou, P. H. Chen, H. M. Chen, B. D. Rong, K. Itoh:
Sub-ns Access Sub-mW/GHz 32 Kb SRAM with 0.45 V Cross-Point-5T Cell and Built-in Y_ Line. A-SSCC 2019: 227-230

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