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"A 0.40pJ/cycle 981 μm2 voltage scalable digital frequency ..."

Martin Cochet et al. (2017)

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DOI: 10.1109/ASSCC.2017.8240218

access: closed

type: Conference or Workshop Paper

metadata version: 2022-04-09

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Martin Cochet, Sylvain Clerc, Guenole Lallement, Fady Abouzeid, Philippe Roche, Jean-Luc Autran:
A 0.40pJ/cycle 981 μm² voltage scalable digital frequency generator for SoC clocking. A-SSCC 2017: 69-72

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