Stop the war!

Остановите войну!

for scientists:

default search action

combined dblp search
author search
venue search
publication search

ask others

"Optimal Loop Tiling for Minimizing Write Operations on NVMs with Complete ..."

Rui Xu et al. (2022)

> Home

Details and statistics

DOI: 10.1109/ASP-DAC52403.2022.9712532

access: closed

type: Conference or Workshop Paper

metadata version: 2023-12-15

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/aspdac/XuSZSL22
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/aspdac/XuSZSL22
Rui Xu, Edwin Hsing-Mean Sha, Qingfeng Zhuge, Yuhong Song, Jingzhi Lin:
Optimal Loop Tiling for Minimizing Write Operations on NVMs with Complete Memory Latency Hiding. ASP-DAC 2022: 389-394

a service of

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.