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"A procedure for software synthesis from VHDL models."

Venkatram Krishnaswamy, Rajesh Gupta, Prithviraj Banerjee (1997)

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DOI: 10.1109/ASPDAC.1997.600341

access: closed

type: Conference or Workshop Paper

metadata version: 2018-02-05

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  - conf/aspdac/KrishnaswamyGB97
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  - https://dblp.org/rec/conf/aspdac/KrishnaswamyGB97
Venkatram Krishnaswamy, Rajesh Gupta, Prithviraj Banerjee:
A procedure for software synthesis from VHDL models. ASP-DAC 1997: 593-598

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