"An Efficient Iterative Improvement Technique for VLSI Circuit Partitioning ..."

C. K. Eem, J. W. Chong (1999)

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DOI: 10.1109/ASPDAC.1999.759713

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-23

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C. K. Eem, J. W. Chong:
An Efficient Iterative Improvement Technique for VLSI Circuit Partitioning Using Hybrid Bucket Structures. ASP-DAC 1999: 73-76

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