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"ATM Cell Modelling using Objective VHDL."
Alberto Allara et al. (1998)
- Alberto Allara, Massimo Bombana, Patrizia Cavalloro, Wolfgang Nebel, Wolfram Putzke-Röming, Martin Radetzki:
ATM Cell Modelling using Objective VHDL. ASP-DAC 1998: 261-264
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