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"A 160 ns 54 bit CMOS division implementation using self-timing and ..."

Ted E. Williams, Mark A. Horowitz (1991)

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DOI: 10.1109/ARITH.1991.145561

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-21

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Ted E. Williams, Mark A. Horowitz:
A 160 ns 54 bit CMOS division implementation using self-timing and symmetrically overlapped SRT stages. IEEE Symposium on Computer Arithmetic 1991: 210-217

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