"Area-time-power efficient VLSI design for residue-to-binary converter ..."

Su-Hon Lin et al. (2008)

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DOI: 10.1109/APCCAS.2008.4745987

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-17

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Su-Hon Lin, Ming-Hwa Sheu, Chao-Hsiang Wang, Yuan-Ching Kuo:
Area-time-power efficient VLSI design for residue-to-binary converter based on moduli set (2ⁿ, 2ⁿ⁺¹-1, 2ⁿ-1). APCCAS 2008: 168-171

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