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"A High-Performance VLSI Architecture for Intra Prediction and Mode ..."

Yu-Chien Kao et al. (2006)

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DOI: 10.1109/APCCAS.2006.342532

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-17

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  - conf/apccas/KaoKLHLHL06
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Yu-Chien Kao, Huang-Chih Kuo, Yin-Tzu Lin, Chia-Wen Hou, Yi-Hsien Li, Hao-Tin Huang, Youn-Long Lin:
A High-Performance VLSI Architecture for Intra Prediction and Mode Decision in H.264/AVC Video Encoding. APCCAS 2006: 562-565

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