BibTeX record journals/vlsisp/ChangHFWC16

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@article{DBLP:journals/vlsisp/ChangHFWC16,
  author       = {Chia{-}Wei Chang and
                  Hao{-}Fan Hsu and
                  Chih{-}Peng Fan and
                  Chung{-}Bin Wu and
                  Robert Chen{-}Hao Chang},
  title        = {A Fast Algorithm-Based Cost-Effective and Hardware-Efficient Unified
                  Architecture Design of 4 {\texttimes} 4, 8 {\texttimes} 8, 16 {\texttimes}
                  16, and 32 {\texttimes} 32 Inverse Core Transforms for {HEVC}},
  journal      = {J. Signal Process. Syst.},
  volume       = {82},
  number       = {1},
  pages        = {69--89},
  year         = {2016},
  url          = {https://doi.org/10.1007/s11265-015-0982-8},
  doi          = {10.1007/S11265-015-0982-8},
  timestamp    = {Sat, 09 Apr 2022 12:26:28 +0200},
  biburl       = {https://dblp.org/rec/journals/vlsisp/ChangHFWC16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}