BibTeX record journals/tvlsi/YinLXLW18

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@article{DBLP:journals/tvlsi/YinLXLW18,
  author       = {Shouyi Yin and
                  Tianyi Lu and
                  Zhicong Xie and
                  Leibo Liu and
                  Shaojun Wei},
  title        = {Bit-Level Disturbance-Aware Memory Partitioning for Parallel Data
                  Access for {MLC} {STT-RAM}},
  journal      = {{IEEE} Trans. Very Large Scale Integr. Syst.},
  volume       = {26},
  number       = {11},
  pages        = {2345--2357},
  year         = {2018},
  url          = {http://doi.ieeecomputersociety.org/10.1109/TVLSI.2018.2862388},
  doi          = {10.1109/TVLSI.2018.2862388},
  timestamp    = {Wed, 11 Mar 2020 18:17:58 +0100},
  biburl       = {https://dblp.org/rec/journals/tvlsi/YinLXLW18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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