BibTeX record journals/tvlsi/LuoLNLY18

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@article{DBLP:journals/tvlsi/LuoLNLY18,
  author       = {Jian Luo and
                  Jing Li and
                  Ning Ning and
                  Yang Liu and
                  Qi Yu},
  title        = {A 0.9-V 12-bit 100-MS/s 14.6-fJ/Conversion-Step {SAR} {ADC} in 40-nm
                  {CMOS}},
  journal      = {{IEEE} Trans. Very Large Scale Integr. Syst.},
  volume       = {26},
  number       = {10},
  pages        = {1980--1988},
  year         = {2018},
  url          = {http://doi.ieeecomputersociety.org/10.1109/TVLSI.2018.2846746},
  doi          = {10.1109/TVLSI.2018.2846746},
  timestamp    = {Mon, 10 May 2021 08:41:51 +0200},
  biburl       = {https://dblp.org/rec/journals/tvlsi/LuoLNLY18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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