BibTeX record journals/tcas/ZhengWLZYZW16

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@article{DBLP:journals/tcas/ZhengWLZYZW16,
  author       = {Xuqiang Zheng and
                  Zhijun Wang and
                  Fule Li and
                  Feng Zhao and
                  Shigang Yue and
                  Chun Zhang and
                  Zhihua Wang},
  title        = {A 14-bit 250 MS/s {IF} Sampling Pipelined {ADC} in 180 nm {CMOS} Process},
  journal      = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
  volume       = {63-I},
  number       = {9},
  pages        = {1381--1392},
  year         = {2016},
  url          = {https://doi.org/10.1109/TCSI.2016.2580703},
  doi          = {10.1109/TCSI.2016.2580703},
  timestamp    = {Thu, 27 Aug 2020 09:26:41 +0200},
  biburl       = {https://dblp.org/rec/journals/tcas/ZhengWLZYZW16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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