BibTeX record journals/jssc/ShihLCLLCLYYCCC19

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@article{DBLP:journals/jssc/ShihLCLLCLYYCCC19,
  author    = {Yi{-}Chun Shih and
               Chia{-}Fu Lee and
               Yen{-}An Chang and
               Po{-}Hao Lee and
               Hon{-}Jarn Lin and
               Yu{-}Lin Chen and
               Ku{-}Feng Lin and
               Ta{-}Ching Yeh and
               Hung{-}Chang Yu and
               Harry Chuang and
               Yu{-}Der Chih and
               Jonathan Chang},
  title     = {Logic Process Compatible 40-nm 16-Mb, Embedded Perpendicular-MRAM
               With Hybrid-Resistance Reference, Sub- {\textdollar}{\textbackslash}mu{\textdollar}
               {A} Sensing Resolution, and 17.5-nS Read Access Time},
  journal   = {J. Solid-State Circuits},
  volume    = {54},
  number    = {4},
  pages     = {1029--1038},
  year      = {2019},
  url       = {https://doi.org/10.1109/JSSC.2018.2889106},
  doi       = {10.1109/JSSC.2018.2889106},
  timestamp = {Fri, 12 Apr 2019 09:23:47 +0200},
  biburl    = {https://dblp.org/rec/bib/journals/jssc/ShihLCLLCLYYCCC19},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
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