BibTeX record journals/jssc/KangJKKCKRKLKLY17

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@article{DBLP:journals/jssc/KangJKKCKRKLKLY17,
  author       = {Dongku Kang and
                  Woopyo Jeong and
                  Chulbum Kim and
                  Doo{-}Hyun Kim and
                  Yong{-}Sung Cho and
                  Kyung{-}Tae Kang and
                  Jinho Ryu and
                  Kyung{-}Min Kang and
                  Sungyeon Lee and
                  Wandong Kim and
                  Hanjun Lee and
                  Jaedoeg Yu and
                  Nayoung Choi and
                  Dong{-}Su Jang and
                  Cheon An Lee and
                  Young{-}Sun Min and
                  Moosung Kim and
                  Ansoo Park and
                  Jae{-}Ick Son and
                  In{-}Mo Kim and
                  Pansuk Kwak and
                  Bong{-}Kil Jung and
                  Doosub Lee and
                  Hyunggon Kim and
                  Jeong{-}Don Ihm and
                  Dae{-}Seok Byeon and
                  Jin{-}Yup Lee and
                  Ki{-}Tae Park and
                  Kyehyun Kyung},
  title        = {256 Gb 3 b/Cell V-nand Flash Memory With 48 Stacked {WL} Layers},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {52},
  number       = {1},
  pages        = {210--217},
  year         = {2017},
  url          = {https://doi.org/10.1109/JSSC.2016.2604297},
  doi          = {10.1109/JSSC.2016.2604297},
  timestamp    = {Sun, 30 Aug 2020 00:13:09 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/KangJKKCKRKLKLY17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}