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BibTeX record journals/jssc/HanSLA17
@article{DBLP:journals/jssc/HanSLA17, author = {Jaeduk Han and Nicholas Sutardja and Yue Lu and Elad Alon}, title = {Design Techniques for a 60-Gb/s 288-mW {NRZ} Transceiver With Adaptive Equalization and Baud-Rate Clock and Data Recovery in 65-nm {CMOS} Technology}, journal = {{IEEE} J. Solid State Circuits}, volume = {52}, number = {12}, pages = {3474--3485}, year = {2017}, url = {https://doi.org/10.1109/JSSC.2017.2740268}, doi = {10.1109/JSSC.2017.2740268}, timestamp = {Thu, 27 Oct 2022 09:45:28 +0200}, biburl = {https://dblp.org/rec/journals/jssc/HanSLA17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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