BibTeX record journals/jssc/BarthPNHFSMKRNC11

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@article{DBLP:journals/jssc/BarthPNHFSMKRNC11,
  author       = {John Barth and
                  Don Plass and
                  Erik Nelson and
                  Charlie Hwang and
                  Gregory Fredeman and
                  Michael A. Sperling and
                  Abraham Mathews and
                  Toshiaki Kirihata and
                  William R. Reohr and
                  Kavita Nair and
                  Nianzheng Cao},
  title        = {A 45 nm {SOI} Embedded {DRAM} Macro for the POWER{\texttrademark}
                  Processor 32 MByte On-Chip {L3} Cache},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {46},
  number       = {1},
  pages        = {64--75},
  year         = {2011},
  url          = {https://doi.org/10.1109/JSSC.2010.2084470},
  doi          = {10.1109/JSSC.2010.2084470},
  timestamp    = {Thu, 19 Jan 2023 14:28:59 +0100},
  biburl       = {https://dblp.org/rec/journals/jssc/BarthPNHFSMKRNC11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}