BibTeX record journals/jcsc/JiangMSWH16

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@article{DBLP:journals/jcsc/JiangMSWH16,
  author       = {Jianfei Jiang and
                  Zhigang Mao and
                  Weiguang Sheng and
                  Qin Wang and
                  Weifeng He},
  title        = {Delay Analysis and Design Optimization for Low-Swing RC-Limited Global
                  Interconnects},
  journal      = {J. Circuits Syst. Comput.},
  volume       = {25},
  number       = {10},
  pages        = {1650121:1--1650121:31},
  year         = {2016},
  url          = {https://doi.org/10.1142/S0218126616501218},
  doi          = {10.1142/S0218126616501218},
  timestamp    = {Wed, 22 Jun 2022 14:34:18 +0200},
  biburl       = {https://dblp.org/rec/journals/jcsc/JiangMSWH16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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