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BibTeX record journals/iet-cds/SiddharthaH18
@article{DBLP:journals/iet-cds/SiddharthaH18, author = {Vishwanatha Siddhartha and Yogesh V. Hote}, title = {Systematic circuit design and analysis of a non-ideal {DC-DC} pulse width modulation boost converter}, journal = {{IET} Circuits Devices Syst.}, volume = {12}, number = {2}, pages = {144--156}, year = {2018}, url = {https://doi.org/10.1049/iet-cds.2017.0168}, doi = {10.1049/IET-CDS.2017.0168}, timestamp = {Mon, 26 Oct 2020 08:20:48 +0100}, biburl = {https://dblp.org/rec/journals/iet-cds/SiddharthaH18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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