BibTeX record journals/ieiceee/LiWZCHYZ14

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@article{DBLP:journals/ieiceee/LiWZCHYZ14,
  author       = {Yi Li and
                  Liang Wen and
                  Yuejun Zhang and
                  Xu Cheng and
                  Jun Han and
                  Zhiyi Yu and
                  Xiaoyang Zeng},
  title        = {An area-efficient dual replica-bitline delay technique for process-variation-tolerant
                  low voltage {SRAM} sense amplifier timing},
  journal      = {{IEICE} Electron. Express},
  volume       = {11},
  number       = {3},
  pages        = {20130992},
  year         = {2014},
  url          = {https://doi.org/10.1587/elex.11.20130992},
  doi          = {10.1587/ELEX.11.20130992},
  timestamp    = {Fri, 12 Feb 2021 22:20:55 +0100},
  biburl       = {https://dblp.org/rec/journals/ieiceee/LiWZCHYZ14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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