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BibTeX record journals/ieiceee/DuYJLLSC17
@article{DBLP:journals/ieiceee/DuYJLLSC17, author = {Yuan Du and Yong Ye and Weiliang Jing and Zhenhua Li and Xiaoyun Li and Zhitang Song and Bomy Chen}, title = {Multi-core architecture with asynchronous clocks to prevent power analysis attacks}, journal = {{IEICE} Electron. Express}, volume = {14}, number = {4}, pages = {20161220}, year = {2017}, url = {https://doi.org/10.1587/elex.14.20161220}, doi = {10.1587/ELEX.14.20161220}, timestamp = {Fri, 12 Feb 2021 22:21:22 +0100}, biburl = {https://dblp.org/rec/journals/ieiceee/DuYJLLSC17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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