BibTeX record journals/cssp/SaponaraRFKLR12

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@article{DBLP:journals/cssp/SaponaraRFKLR12,
  author       = {Sergio Saponara and
                  Massimo Rovini and
                  Luca Fanucci and
                  Athanasios Karachalios and
                  George Lentaris and
                  Dionysios I. Reisis},
  title        = {Design and Comparison of {FFT} {VLSI} Architectures for SoC Telecom
                  Applications with Different Flexibility, Speed and Complexity Trade-Offs},
  journal      = {Circuits Syst. Signal Process.},
  volume       = {31},
  number       = {2},
  pages        = {627--649},
  year         = {2012},
  url          = {https://doi.org/10.1007/s00034-011-9332-7},
  doi          = {10.1007/S00034-011-9332-7},
  timestamp    = {Wed, 07 Dec 2022 23:04:26 +0100},
  biburl       = {https://dblp.org/rec/journals/cssp/SaponaraRFKLR12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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