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BibTeX record journals/cal/SonCRLA17
@article{DBLP:journals/cal/SonCRLA17, author = {Young Hoon Son and Hyunyoon Cho and Yuhwan Ro and Jae W. Lee and Jung Ho Ahn}, title = {{SALAD:} Achieving Symmetric Access Latency with Asymmetric {DRAM} Architecture}, journal = {{IEEE} Comput. Archit. Lett.}, volume = {16}, number = {1}, pages = {76--79}, year = {2017}, url = {https://doi.org/10.1109/LCA.2016.2525760}, doi = {10.1109/LCA.2016.2525760}, timestamp = {Tue, 21 Mar 2023 21:15:50 +0100}, biburl = {https://dblp.org/rec/journals/cal/SonCRLA17.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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