BibTeX record conf/vlsid/RaghunathanRL00

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@inproceedings{DBLP:conf/vlsid/RaghunathanRL00,
  author       = {Vijay Raghunathan and
                  Srivaths Ravi and
                  Ganesh Lakshminarayana},
  title        = {High-Level Synthesis with Variable-Latency Components},
  booktitle    = {13th International Conference on {VLSI} Design {(VLSI} Design 2000),
                  4-7 January 2000, Calcutta, India},
  pages        = {220--227},
  publisher    = {{IEEE} Computer Society},
  year         = {2000},
  url          = {https://doi.org/10.1109/ICVD.2000.812612},
  doi          = {10.1109/ICVD.2000.812612},
  timestamp    = {Fri, 24 Mar 2023 00:03:59 +0100},
  biburl       = {https://dblp.org/rec/conf/vlsid/RaghunathanRL00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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