BibTeX record conf/vlsid/MurotiyaG15

download as .bib file

@inproceedings{DBLP:conf/vlsid/MurotiyaG15,
  author       = {Sneh Lata Murotiya and
                  Anu Gupta},
  title        = {Design of High Speed Ternary Full Adder and Three-Input {XOR} Circuits
                  Using CNTFETs},
  booktitle    = {28th International Conference on {VLSI} Design, {VLSID} 2015, Bangalore,
                  India, January 3-7, 2015},
  pages        = {292--297},
  publisher    = {{IEEE} Computer Society},
  year         = {2015},
  url          = {https://doi.org/10.1109/VLSID.2015.56},
  doi          = {10.1109/VLSID.2015.56},
  timestamp    = {Fri, 24 Mar 2023 00:03:59 +0100},
  biburl       = {https://dblp.org/rec/conf/vlsid/MurotiyaG15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
a service of  Schloss Dagstuhl - Leibniz Center for Informatics

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.