BibTeX record conf/vlsid/HsiungC03

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@inproceedings{DBLP:conf/vlsid/HsiungC03,
  author       = {Pao{-}Ann Hsiung and
                  Shu{-}Yu Cheng},
  title        = {Automating Formal Modular Verification of Asynchronous Real-Time Embedded
                  Systems},
  booktitle    = {16th International Conference on {VLSI} Design {(VLSI} Design 2003),
                  4-8 January 2003, New Delhi, India},
  pages        = {249--254},
  publisher    = {{IEEE} Computer Society},
  year         = {2003},
  url          = {https://doi.org/10.1109/ICVD.2003.1183145},
  doi          = {10.1109/ICVD.2003.1183145},
  timestamp    = {Fri, 24 Mar 2023 00:04:00 +0100},
  biburl       = {https://dblp.org/rec/conf/vlsid/HsiungC03.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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