BibTeX record conf/vlsic/SatpathySMAKAHK18

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@inproceedings{DBLP:conf/vlsic/SatpathySMAKAHK18,
  author       = {Sudhir Satpathy and
                  Vikram B. Suresh and
                  Sanu Mathew and
                  Mark A. Anders and
                  Himanshu Kaul and
                  Amit Agarwal and
                  Steven Hsu and
                  Ram Krishnamurthy},
  title        = {220MV-900MV 794/584/754 {GBPS/W} Reconfigurable GF(2\({}^{\mbox{4}}\))2
                  AES/SMS4/Camellia Symmetric-Key Cipher Accelerator in 14NM Tri-Gate
                  {CMOS}},
  booktitle    = {2018 {IEEE} Symposium on {VLSI} Circuits, Honolulu, HI, USA, June
                  18-22, 2018},
  pages        = {175--176},
  publisher    = {{IEEE}},
  year         = {2018},
  url          = {https://doi.org/10.1109/VLSIC.2018.8502262},
  doi          = {10.1109/VLSIC.2018.8502262},
  timestamp    = {Fri, 25 Feb 2022 16:33:50 +0100},
  biburl       = {https://dblp.org/rec/conf/vlsic/SatpathySMAKAHK18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}