BibTeX record conf/vlsic/PalPFGTRXZAWBCC19

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@inproceedings{DBLP:conf/vlsic/PalPFGTRXZAWBCC19,
  author       = {Subhankar Pal and
                  Dong{-}Hyeon Park and
                  Siying Feng and
                  Paul Gao and
                  Jielun Tan and
                  Austin Rovinski and
                  Shaolin Xie and
                  Chun Zhao and
                  Aporva Amarnath and
                  Timothy Wesley and
                  Jonathan Beaumont and
                  Kuan{-}Yu Chen and
                  Chaitali Chakrabarti and
                  Michael B. Taylor and
                  Trevor N. Mudge and
                  David T. Blaauw and
                  Hun{-}Seok Kim and
                  Ronald G. Dreslinski},
  title        = {A 7.3 {M} Output Non-Zeros/J Sparse Matrix-Matrix Multiplication Accelerator
                  using Memory Reconfiguration in 40 nm},
  booktitle    = {2019 Symposium on {VLSI} Circuits, Kyoto, Japan, June 9-14, 2019},
  pages        = {150},
  publisher    = {{IEEE}},
  year         = {2019},
  url          = {https://doi.org/10.23919/VLSIC.2019.8778147},
  doi          = {10.23919/VLSIC.2019.8778147},
  timestamp    = {Mon, 20 Nov 2023 13:58:36 +0100},
  biburl       = {https://dblp.org/rec/conf/vlsic/PalPFGTRXZAWBCC19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}