BibTeX record conf/vlsic/KumarSKSAKAHCKD19

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@inproceedings{DBLP:conf/vlsic/KumarSKSAKAHCKD19,
  author       = {Raghavan Kumar and
                  Vikram B. Suresh and
                  Monodeep Kar and
                  Sudhir Satpathy and
                  Mark A. Anders and
                  Himanshu Kaul and
                  Amit Agarwal and
                  Steven Hsu and
                  Gregory K. Chen and
                  Ram Krishnamurthy and
                  Vivek De and
                  Sanu Mathew},
  title        = {A 4900{\texttimes}m\({}^{\mbox{2}}\) 839Mbps Side-Channel Attack Resistant
                  {AES-128} in 14nm {CMOS} with Heterogeneous Sboxes, Linear Masked
                  MixColumns and Dual-Rail Key Addition},
  booktitle    = {2019 Symposium on {VLSI} Circuits, Kyoto, Japan, June 9-14, 2019},
  pages        = {234},
  publisher    = {{IEEE}},
  year         = {2019},
  url          = {https://doi.org/10.23919/VLSIC.2019.8778041},
  doi          = {10.23919/VLSIC.2019.8778041},
  timestamp    = {Fri, 25 Feb 2022 16:33:50 +0100},
  biburl       = {https://dblp.org/rec/conf/vlsic/KumarSKSAKAHCKD19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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