BibTeX record conf/vlsi-dat/ChengDKCLYSWSC19

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@inproceedings{DBLP:conf/vlsi-dat/ChengDKCLYSWSC19,
  author       = {Chuan{-}Cheng Cheng and
                  Jeremy Dunworth and
                  Sriram Kalpat and
                  Haitao Cheng and
                  Gang Liu and
                  Ming{-}Ta Yang and
                  Wing Sy and
                  Joseph Wang and
                  Kamal Sahota and
                  P. R. Chidi Chidambaram},
  title        = {Silicon Process Impact on 5G {NR} mmWave Front End Design and Performance},
  booktitle    = {International Symposium on {VLSI} Design, Automation and Test, {VLSI-DAT}
                  2019, Hsinchu, Taiwan, April 22-25, 2019},
  pages        = {1--2},
  publisher    = {{IEEE}},
  year         = {2019},
  url          = {https://doi.org/10.1109/VLSI-DAT.2019.8741576},
  doi          = {10.1109/VLSI-DAT.2019.8741576},
  timestamp    = {Fri, 23 Dec 2022 15:13:26 +0100},
  biburl       = {https://dblp.org/rec/conf/vlsi-dat/ChengDKCLYSWSC19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}