BibTeX record conf/socc/YangYHLLCCLCCHJLLLSWLH11

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@inproceedings{DBLP:conf/socc/YangYHLLCCLCCHJLLLSWLH11,
  author       = {Hao{-}I Yang and
                  Shih{-}Chi Yang and
                  Mao{-}Chih Hsia and
                  Yung{-}Wei Lin and
                  Yi{-}Wei Lin and
                  Chien{-}Hen Chen and
                  Chi{-}Shin Chang and
                  Geng{-}Cing Lin and
                  Yin{-}Nien Chen and
                  Ching{-}Te Chuang and
                  Wei Hwang and
                  Shyh{-}Jye Jou and
                  Nan{-}Chun Lien and
                  Hung{-}Yu Li and
                  Kuen{-}Di Lee and
                  Wei{-}Chiang Shih and
                  Ya{-}Ping Wu and
                  Wen{-}Ta Lee and
                  Chih{-}Chiang Hsu},
  title        = {A high-performance low {VMIN} 55nm 512Kb disturb-free 8T {SRAM} with
                  adaptive {VVSS} control},
  booktitle    = {{IEEE} 24th International SoC Conference, {SOCC} 2011, Taipei, Taiwan,
                  September 26-28, 2011},
  pages        = {197--200},
  publisher    = {{IEEE}},
  year         = {2011},
  url          = {https://doi.org/10.1109/SOCC.2011.6085080},
  doi          = {10.1109/SOCC.2011.6085080},
  timestamp    = {Wed, 16 Oct 2019 14:14:53 +0200},
  biburl       = {https://dblp.org/rec/conf/socc/YangYHLLCCLCCHJLLLSWLH11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}