BibTeX record conf/socc/LiaoLCCYCJHTHWKH13

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@inproceedings{DBLP:conf/socc/LiaoLCCYCJHTHWKH13,
  author       = {Wei{-}Nan Liao and
                  Nan{-}Chun Lien and
                  Chi{-}Shin Chang and
                  Li{-}Wei Chu and
                  Hao{-}I Yang and
                  Ching{-}Te Chuang and
                  Shyh{-}Jye Jou and
                  Wei Hwang and
                  Ming{-}Hsien Tu and
                  Huan{-}Shun Huang and
                  Jian{-}Hao Wang and
                  Paul{-}Sen Kan and
                  Yong{-}Jyun Hu},
  editor       = {Norbert Schuhmann and
                  Kaijian Shi and
                  Nagi Naganathan},
  title        = {A 40nm 1.0Mb 6T pipeline {SRAM} with digital-based Bit-Line Under-Drive,
                  Three-Step-Up Word-Line, Adaptive Data-Aware Write-Assist with {VCS}
                  tracking and Adaptive Voltage Detector for boosting control},
  booktitle    = {2013 {IEEE} International {SOC} Conference, Erlangen, Germany, September
                  4-6, 2013},
  pages        = {110--115},
  publisher    = {{IEEE}},
  year         = {2013},
  url          = {https://doi.org/10.1109/SOCC.2013.6749670},
  doi          = {10.1109/SOCC.2013.6749670},
  timestamp    = {Wed, 16 Oct 2019 14:14:53 +0200},
  biburl       = {https://dblp.org/rec/conf/socc/LiaoLCCYCJHTHWKH13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}