BibTeX record conf/mwscas/XiongLDM17

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@inproceedings{DBLP:conf/mwscas/XiongLDM17,
  author       = {Jiu Xiong and
                  Jin Liu and
                  Yucheng Dai and
                  Hlaing Minn},
  title        = {An open-loop 28GHz 16-phase clock generator in 28nm {CMOS}},
  booktitle    = {{IEEE} 60th International Midwest Symposium on Circuits and Systems,
                  {MWSCAS} 2017, Boston, MA, USA, August 6-9, 2017},
  pages        = {305--308},
  publisher    = {{IEEE}},
  year         = {2017},
  url          = {https://doi.org/10.1109/MWSCAS.2017.8052921},
  doi          = {10.1109/MWSCAS.2017.8052921},
  timestamp    = {Thu, 16 Jun 2022 19:32:56 +0200},
  biburl       = {https://dblp.org/rec/conf/mwscas/XiongLDM17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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