BibTeX record conf/mwscas/BanalaHH19

download as .bib file

@inproceedings{DBLP:conf/mwscas/BanalaHH19,
  author       = {Vishal Reddy Banala and
                  Cheng Hao and
                  Chris Hutchens},
  editor       = {Hoi Lee and
                  Randall L. Geiger},
  title        = {Secure Interface Architecture for Charge Trap Transistor {(CTT)} Based
                  {EEPROM}},
  booktitle    = {62nd {IEEE} International Midwest Symposium on Circuits and Systems,
                  {MWSCAS} 2019, Dallas, TX, USA, August 4-7, 2019},
  pages        = {219--222},
  publisher    = {{IEEE}},
  year         = {2019},
  url          = {https://doi.org/10.1109/MWSCAS.2019.8885383},
  doi          = {10.1109/MWSCAS.2019.8885383},
  timestamp    = {Wed, 06 Nov 2019 17:34:44 +0100},
  biburl       = {https://dblp.org/rec/conf/mwscas/BanalaHH19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
a service of  Schloss Dagstuhl - Leibniz Center for Informatics

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.