BibTeX record conf/mtdt/ChengH05

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@inproceedings{DBLP:conf/mtdt/ChengH05,
  author       = {Shin{-}Pao Cheng and
                  Shi{-}Yu Huang},
  title        = {A low-power {SRAM} design using quiet-bitline architecture},
  booktitle    = {13th {IEEE} International Workshop on Memory Technology, Design, and
                  Testing {(MTDT} 2005), 3-5 August 2005, Taipei, Taiwan},
  pages        = {135--139},
  publisher    = {{IEEE} Computer Society},
  year         = {2005},
  url          = {https://doi.org/10.1109/MTDT.2005.10},
  doi          = {10.1109/MTDT.2005.10},
  timestamp    = {Fri, 24 Mar 2023 00:03:36 +0100},
  biburl       = {https://dblp.org/rec/conf/mtdt/ChengH05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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