BibTeX record conf/isvlsi/DevRPHB16

download as .bib file

@inproceedings{DBLP:conf/isvlsi/DevRPHB16,
  author    = {Kapil Dev and
               Sherief Reda and
               Indrani Paul and
               Wei Huang and
               Wayne P. Burleson},
  title     = {Workload-Aware Power Gating Design and Run-Time Management for Massively
               Parallel GPGPUs},
  booktitle = {{IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2016, Pittsburgh,
               PA, USA, July 11-13, 2016},
  pages     = {242--247},
  publisher = {{IEEE} Computer Society},
  year      = {2016},
  url       = {https://doi.org/10.1109/ISVLSI.2016.60},
  doi       = {10.1109/ISVLSI.2016.60},
  timestamp = {Mon, 06 Apr 2020 17:04:26 +0200},
  biburl    = {https://dblp.org/rec/conf/isvlsi/DevRPHB16.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
a service of Schloss Dagstuhl - Leibniz Center for Informatics