BibTeX record conf/isscc/YunSJCLKKCJC15

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@inproceedings{DBLP:conf/isscc/YunSJCLKKCJC15,
  author       = {Won{-}Joo Yun and
                  Indal Song and
                  Hanki Jeoung and
                  Hundai Choi and
                  Seok{-}Ho Lee and
                  Jun{-}Bae Kim and
                  Chi{-}Wook Kim and
                  Jung{-}Hwan Choi and
                  Seong{-}Jin Jang and
                  Joo{-}Sun Choi},
  title        = {17.7 {A} digital {DLL} with hybrid {DCC} using 2-step duty error extraction
                  and 180{\textdegree} phase aligner for 2.67Gb/S/pin 16Gb 4-H stack
                  {DDR4} {SDRAM} with TSVs},
  booktitle    = {2015 {IEEE} International Solid-State Circuits Conference, {ISSCC}
                  2015, Digest of Technical Papers, San Francisco, CA, USA, February
                  22-26, 2015},
  pages        = {1--3},
  publisher    = {{IEEE}},
  year         = {2015},
  url          = {https://doi.org/10.1109/ISSCC.2015.7063056},
  doi          = {10.1109/ISSCC.2015.7063056},
  timestamp    = {Wed, 16 Oct 2019 14:14:55 +0200},
  biburl       = {https://dblp.org/rec/conf/isscc/YunSJCLKKCJC15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}