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BibTeX record conf/isscc/TrinhSN09
@inproceedings{DBLP:conf/isscc/TrinhSN09, author = {Cuong Trinh and Noboru Shibata and Takeshi Nakano and Mikio Ogawa and Jumpei Sato and Yoshikazu Takeyama and Katsuaki Isobe and Binh Le and Farookh Moogat and Nima Mokhlesi and Kenji Kozakai and Patrick Hong and Teruhiko Kamei and Kiyoaki Iwasa and J. Nakai and Takahiro Shimizu and Mitsuaki Honma and Shintaro Sakai and Toshimasa Kawaai and Satoru Hoshi and Jonghak Yuh and Cynthia Hsu and Taiyuan Tseng and Jason Li and Jayson Hu and M. Liu and Shahzad Khalid and J. Chen and Mitsuyuki Watanabe and Hung{-}Szu Lin and Junhui Yang and K. McKay and Khanh Nguyen and Tuan Pham and Y. Matsuda and K. Nakamura and Kazunori Kanebako and Susumu Yoshikawa and W. Igarashi and Atsushi Inoue and T. Takahashi and Yukio Komatsu and C. Suzuki and Kousuke Kanazawa and Masaaki Higashitani and Seungpil Lee and T. Murai and K. Nguyen and James Lan and Sharon Huynh and Mark Murin and Mark Shlick and Menahem Lasser and Raul Cernea and Mehrdad Mofidi and K. Schuegraf and Khandker Quader}, title = {A 5.6MB/s 64Gb 4b/Cell {NAND} Flash memory in 43nm {CMOS}}, booktitle = {{IEEE} International Solid-State Circuits Conference, {ISSCC} 2009, Digest of Technical Papers, San Francisco, CA, USA, 8-12 February, 2009}, pages = {246--247}, publisher = {{IEEE}}, year = {2009}, url = {https://doi.org/10.1109/ISSCC.2009.4977400}, doi = {10.1109/ISSCC.2009.4977400}, timestamp = {Wed, 24 Mar 2021 10:03:50 +0100}, biburl = {https://dblp.org/rec/conf/isscc/TrinhSN09.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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