BibTeX record conf/isscc/SomasekharYALKHRKBDK08

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@inproceedings{DBLP:conf/isscc/SomasekharYALKHRKBDK08,
  author       = {Dinesh Somasekhar and
                  Yibin Ye and
                  Paolo A. Aseron and
                  Shih{-}Lien Lu and
                  Muhammad M. Khellah and
                  Jason Howard and
                  Gregory Ruhl and
                  Tanay Karnik and
                  Shekhar Y. Borkar and
                  Vivek De and
                  Ali Keshavarzi},
  title        = {2GHz 2Mb 2T Gain-Cell Memory Macro with 128GB/s Bandwidth in a 65nm
                  Logic Process},
  booktitle    = {2008 {IEEE} International Solid-State Circuits Conference, {ISSCC}
                  2008, Digest of Technical Papers, San Francisco, CA, USA, February
                  3-7, 2008},
  pages        = {274--275},
  publisher    = {{IEEE}},
  year         = {2008},
  url          = {https://doi.org/10.1109/ISSCC.2008.4523163},
  doi          = {10.1109/ISSCC.2008.4523163},
  timestamp    = {Sun, 02 Oct 2022 16:10:08 +0200},
  biburl       = {https://dblp.org/rec/conf/isscc/SomasekharYALKHRKBDK08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}