BibTeX record conf/isscc/KulkarniTANATD15

• > Home > conf/isscc/KulkarniTANATD15

@inproceedings{DBLP:conf/isscc/KulkarniTANATD15,
  author       = {Jaydeep P. Kulkarni and
                  Carlos Tokunaga and
                  Paolo A. Aseron and
                  Trang Nguyen and
                  Charles Augustine and
                  James W. Tschanz and
                  Vivek De},
  title        = {4.7 {A} 409GOPS/W adaptive and resilient domino register file in 22nm
                  tri-gate {CMOS} featuring in-situ timing margin and error detection
                  for tolerance to within-die variation, voltage droop, temperature
                  and aging},
  booktitle    = {2015 {IEEE} International Solid-State Circuits Conference, {ISSCC}
                  2015, Digest of Technical Papers, San Francisco, CA, USA, February
                  22-26, 2015},
  pages        = {1--3},
  publisher    = {{IEEE}},
  year         = {2015},
  url          = {https://doi.org/10.1109/ISSCC.2015.7062936},
  doi          = {10.1109/ISSCC.2015.7062936},
  timestamp    = {Wed, 15 Jul 2020 09:05:21 +0200},
  biburl       = {https://dblp.org/rec/conf/isscc/KulkarniTANATD15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}